| 摘要 |
PURPOSE:To reduce the burden on a processor by providing an interrupt request control circuit and a time set register and varying the interrupt generation time of the processor in accordance with the time set to the register. CONSTITUTION:An interrupt request control circuit 5 which interrupts a processor 1 by the interrupt request from the interface side and a time set register 6 which sets the time to the next interrupt after interrupt generation are connected, and the interrupt generation time of the processor 1 is varied by the time set to the register 6. That is, when the interrupt request signal is issued from the interface side to the processor 1, the interrupt request control circuit 5 provided between them delays the interrupt request signal by the time set to the time set register 6 and arbitrarily changes the time from interrupt request negation to next interrupt request enabling to transfer data, thereby reducing the burden on the processor. |
