| 摘要 |
PURPOSE:To alternately bring both switch elements to opening and closing operations by providing a logical gate on each switch element of a pair of switch elements, respectively, and applying alternately an input signal to both the logical gates in a state that the gate opening condition is satisfied. CONSTITUTION:As for an output circuit 10, a MOS transistor of a CMOS constitution is connected in series as a pair of switch elements 11, 12. Also, they are operated by outputs of logical gates 21, 22 provided on every switch element, respectively. As for logical gates 21, 22, a NAND gate is used. Subsequently, an input signal is applied alternately to both logical gages 21, 22 in a logical state that the gate opening condition can be satisfied to each one input of both the logical gates 21, 22, and to the other input of one logical gate, an output of the other logical gate is provided in a logical state that the gate opening condition is satisfied together with an input signal applied to one input thereof, by which both switch elements are brought to opening closing operations, alternately. |
