发明名称 DIGITAL PLL CIRCUIT
摘要 <p>PURPOSE:To shorten a pull-in time by controlling input from a first-order loop to a second-order loop by observing the change of a phase difference in the first-order loop corresponding to phase comparison, and detecting the rotating direction of a phase and a quantity of the phase difference. CONSTITUTION:The output (a) and (b) of a digital phase comparator are supplied to an up counter 20 in a phase difference monitoring circuit 15, and an output digital signal is impressed on the clear terminal CBR of the counter via a frequency division circuit 23. Therefore, the output (a) and (b) are counted at every (n) frequencies of an output frequency fout, and count output is sent to a state discrimination circuit 21. At the circuit 21, required information such as the deviation direction of the phase, etc., is discriminated based on the count output, and a result is held at a latch circuit 22. Next, input (c) and (d) from the first-order loop are supplied to a counter 24 in a second-order input control circuit 16, and the count output is held at a latch circuit 25. Data in the circuit 25 is outputted via a control gate circuit 26. The circuit 26 is turn-on/turn-off-controlled corresponding to the data in the circuit 22, and controls and adds the output data in the circuit 25 on a filter 3 in the second loop.</p>
申请公布号 JPH01194715(A) 申请公布日期 1989.08.04
申请号 JP19880019000 申请日期 1988.01.29
申请人 KYOCERA CORP 发明人 KOJIMA TAKETOSHI;JINNO JUNICHI;KIDO TOSHIKI;MASUKI MASAMI
分类号 H03L7/06;H04N19/00 主分类号 H03L7/06
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