发明名称 FREQUENCY SYNTHESIZER
摘要 PURPOSE:To decrease the output frequency error attended with the frequency error of a reference oscillator by calculating the frequency division number under a prescribed condition. CONSTITUTION:The output of a reference oscillator 11 is subject to frequency division by a frequency division number mu by the 1st variable frequency divider 7, the phase of the output and that of the output of the 2nd variable frequency divider 3 are compared by a phase comparator 4, the voltage controlled oscillator 6 is controlled by the output and the output of the voltage controlled oscillator 6 is subject to frequency division by a frequency division number nu by the 2nd variable frequency divider 3. K-set of oscillators are provided as the reference oscillator 11 and one of K-set of frequency output is selected by a switch 12. The control circuit 8 uses a value mu smaller than a prescribed value mu0 and decides values mu, nu to select fi in a way of minimizing the error with an outputted frequency fi(nu/mu) and a frequency to be outputted. The error in the output frequency due to the frequency error of the reference oscillator is decreased.
申请公布号 JPH01198827(A) 申请公布日期 1989.08.10
申请号 JP19880023575 申请日期 1988.02.03
申请人 NIPPON TELEGR & TELEPH CORP <NTT> 发明人 TARUSAWA YOSHIAKI;SUZUKI HIROSHI;SAITO SHIGEKI
分类号 H03L7/187;H03L7/18 主分类号 H03L7/187
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