| 摘要 |
A MIS transistor having a deposited and buried isolation is disclosed. An element forming region (12) having a source region, drain region and channel region is formed in a semiconductor substrate (10). An insulating film (16) is deposited on and buried within the semiconductor substrate, in such a way as to surround the element forming region. A gate electrode (20) is formed on the channel region, through a gate insulating film (18). The gate electrode exists only on the element forming region, and the edge portion (44) in the direction of the channel width of the gate electrode is substantially aligned with the edge (46) of the element forming region. |
