发明名称 PICTURE DATA COMPRESSING SYSTEM
摘要 PURPOSE:To lower redundancy with an adjacent element and to improve an encoding efficiency by dividing an index into a high-order bit and a low-order bit and executing the forecasting sequence encoding of the high-order bit with the index of the block of the circumference. CONSTITUTION:Out of two compressing signals distributed from a code distributer 50, one of them is inputted to a variable length decoder 53 and other one is inputted to a variable length decoder 54 respectively, and the signal decoded here is sent converted to forecasting inverse converting circuits 56 and 57 and inversely converted. Next, the high-order bit of the index is decoded by a variable length decoder 51, the forecasting sequence of the signal is inputted to a forecasting sequence inverse converting circuit 55 and the index high-order bit of the noticed block is restored. Based on the deviation to occur thereafter, the distributer 50 is switched to a variable length decoder 52 and the low-order bit of the index is decoded. Next, the bits of the high-order and the low-order are addressed to a code table 58 and outputted through a picture reproducing circuit 59 from a terminal 5 as a picture signal.
申请公布号 JPH01286677(A) 申请公布日期 1989.11.17
申请号 JP19880116281 申请日期 1988.05.13
申请人 FUJITSU LTD 发明人 YOSHIDA SHIGERU
分类号 H04N1/41;H04N1/413;H04N7/12 主分类号 H04N1/41
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