| 摘要 |
PURPOSE:To recover a synchronizing state in a short period by outputting a signal corresponding to an input terminal number, deviating the initial value by r-bit if out of synchronism takes place and a coincidence signal is inputted from any one of n-set of synchronizing bit detection circuits. CONSTITUTION:When a 5th input reaches out of synchronism state and a coincidence signal is inputted from a synchronizing bit detection circuit 6, a selection circuit 9 outputs signals of alpha=0, beta=0, gamma=0. Similarly, when the coincidence signal is inputted from synchronizing bit detection circuits 7, 8, 5, the circuit 9 outputs signals of (alpha=1, beta=0, gamma=1), (alpha=0, beta=1, gamma=1), (alpha=1, beta=1, gamma=1), respectively. Upon the receipt of the said signals alpha, beta, gamma, the count of the pulse generating circuit 18 is set initially respectively as a1, a2, a3 and a4. Thus, the discrimination circuit 10 detects coincidence from the pulses E, I and outputs an L level signal representing the synchronizing state. |
