| 摘要 |
A semiconductor device, eg a high power FET device 101, includes a metallic layer 7a extending from a rear surface to a front surface to protect device side walls during handling. During fabrication a separation groove 13 is spaced outwardly from the device on a wafer and contains a metallic layer which becomes the side wall protection after dicing the device from the wafer. The side wall protection layer 7a extends onto portions of the front surface of the device as a measurement electrode. A via-hole 9 extends through the substrate connecting a rear surface electrode to the front surface. The arrangement gives access to the source, drain, and gate electrodes of the device from the front surface for measuring the electrical characteristics of the device while it is still part of a wafer containing a large number of devices. Preferably, the separation grooves 13 are wider and deeper than the via-holes 9. The devices are made by etching the separation grooves and the via-holes from the front surface of a substrate. Thereafter, the thickness of the substrate is reduced from the rear surface. <IMAGE>
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