发明名称 CORRECTION BIT POSITION INFORMATION OUTPUT METHOD IN MEMORY SYSTEM WITH ECC
摘要 PURPOSE:To eliminate the need of an exclusive bus for outputting correction bit position information, and to contain the number of times of correction in the contents of the outputted correction bit position information. CONSTITUTION:A correction bit position information storage part 13 stores data contained in a memory 14 and correction bit position information having a correction frequency counter corresponding to a position of each bit of a check bit. An error correcting circuit 12 checks whether a bit change exists in the data inputted from the memory 14 and the check bit or not, and in the case the bit change exists, the data in which the bit change is corrected is outputted and by reflecting its correction, the correction bit position information in the correction bit position information storage part 13 is updated. A selecting circuit 15 selects one of an output of the correction bit position information from the correction bit position information storage part 13 and an output of the data from the error correcting circuit 12 as an output to a data bus 21, based on a signal on a system bus 20.
申请公布号 JPH04349549(A) 申请公布日期 1992.12.04
申请号 JP19910151149 申请日期 1991.05.27
申请人 NEC CORP 发明人 KITAJIMA TATSUYA
分类号 G06F11/10;G06F12/16 主分类号 G06F11/10
代理机构 代理人
主权项
地址