发明名称 |
Dual edge-triggered digital storage element and method therefor |
摘要 |
A dual edge-triggered digital storage element is disclosed. This storage element operates much like a standard digital latch, with the exception that the data input is clocked to the output on both the rising and the falling edge of the clock input. This allows the frequency of the clock signal to be reduced by half, reducing system complexity and reducing power consumption.
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申请公布号 |
US5179295(A) |
申请公布日期 |
1993.01.12 |
申请号 |
US19920854154 |
申请日期 |
1992.03.20 |
申请人 |
VLSI TECHNOLOGY, INC. |
发明人 |
MATTISON, PHILLIP E.;CAVIASCA, KENNETH P. |
分类号 |
H03K3/037 |
主分类号 |
H03K3/037 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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