DATAPIPE DESTINATION AND SOURCE DEVICES

摘要

An integrated circuit ( 102 ) in communication with a host circuit ( 104 ) includes an interconnect bus ( 344 ) and a plurality of programmable elements ( 116 - 130 ). Each of the programmable elements ( 116 - 130 ) includes a control interface ( 354 ) for receiving a control signal, the control signal causing the memory element ( 338 ) to selectively operate in one of a plurality of modes. In a first mode, the memory element ( 338 ) communicates stored data to the output port upon receiving the control signal; in a second mode the memory element ( 338 ) communicates stored data to the output port upon detecting valid data at the input port; in a third mode the memory element stores a first data value consisting of at least a portion of a single data word received at the input port; and in a fourth mode the memory element ( 338 ) stores a second data value consisting of at least a portion of each of two separate input values received at the input port. Each programmable element may write data to and read data from a memory element of any of the other programmable elements.