发明名称 SYSTEM AND METHOD FOR CALCULATING VARIATION IN VOLTAGE IMPRESSED ON IC CHIP
摘要 PROBLEM TO BE SOLVED: To provide a system and method to identify regions where voltage supplied by the power distribution network of an IC chip is too low (or too high). SOLUTION: Virtually uniform voltage is impressed on the power surface of the power distribution network connected to the IC chip. A plurality of current sources distributed over the chip are turned on. Voltage in a plurality of positions on the chip is sought. When the current source is turned on, a clock that works freely on a clock tree distributed over the chip becomes effective, and the operation of a function logic inside the IC is prohibited. COPYRIGHT: (C)2009,JPO&INPIT
申请公布号 JP2008258629(A) 申请公布日期 2008.10.23
申请号 JP20080097482 申请日期 2008.04.03
申请人 TOSHIBA CORP 发明人 TAKASE SATORU
分类号 H01L21/822;G01R31/28;H01L21/82;H01L27/04 主分类号 H01L21/822
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