| 摘要 |
PROBLEM TO BE SOLVED: To provide an integrated circuit for eliminating, in higher probability, an integrated circuit that is doubtful to generate an initial failure in the same step as for an ordinary wafer test and for improving quality of the integrated circuit without rise in cost of the integrated circuit. SOLUTION: In the wafer with a driver 1 for driving a plurality of displays formed through a wafer process, a dust detecting circuit in the driver 1 for driving each display and measuring terminals 6, 7 in the dust detecting circuit are formed on a scribe line in the periphery of the driver 1 for driving the displays. The operation test or stress test conducted by using a terminal provided on the driver 1 for driving displays and dust detecting test using measuring terminals 6, 7 of the dust detecting circuit are conducted with the wafer test in the same step. COPYRIGHT: (C)2009,JPO&INPIT
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