发明名称 METHOD FOR PROCESS INTEGRATION OF NON-VOLATILE MEMORY CELL TRANSISTORS WITH TRANSISTORS OF ANOTHER TYPE
摘要 A method for making a semiconductor device having non-volatile memory cell transistors and transistors of another type is provided. In the method, a substrate is provided having an NVM region, a high voltage (HV) region, and a low voltage (LV) region. The method includes forming a gate dielectric layer on the HV and LV regions. A tunnel oxide layer is formed over the substrate in the NVM region and the gate dielectric in the HV and LV regions. A first polysilicon layer is formed over the tunnel dielectric layer and gate dielectric layer. The first polysilicon layer is patterned to form NVM floating gates. An ONO layer is formed over the first polysilicon layer. A single etch removal step is used to form gates for the HV transistors from the first polysilicon layer while removing the first polysilicon layer from the LV region.
申请公布号 US2008261367(A1) 申请公布日期 2008.10.23
申请号 US20070738003 申请日期 2007.04.20
申请人 PRINZ ERWIN J;SHROFF MEHUL D 发明人 PRINZ ERWIN J.;SHROFF MEHUL D.
分类号 H01L21/8232 主分类号 H01L21/8232
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