| 摘要 |
<p>It is an object to provide a test device comprised of a plurality of match detecting units that receive status signals indicative of command processing status output from status output terminals of a memory under test, respectively, and that output match signals in response to that the status signals are in ready status, respectively, a judging unit for judging that the memory under test has completed a plurality of the commands in accordance with logical products of a plurality of the match signals output from a plurality of the match detecting units, an allocating unit for allocating, in the test of the memory under test having a plurality of memory banks, a plurality of the respective match detecting units to a plurality of the respective memory banks, wherein, in the test of the memory under test having a plurality of the memory banks, each of the match detecting units receives the status signal of the memory bank corresponding to the status signal indicative of each command processing status output from the status output terminals of the memory under test at a different cycle for every memory bank to output the match signal.</p> |
