| 摘要 |
<p>A system, method, and logic are disclosed for automatic hardware bus encryption/decryption. The logic (200) receives a memory access request comprising a physical address of a memory location from a processor. The logic translates the physical address (at translation 314), and uses the translated physical address and a seed value in a pseudo random number generator (316) to produce an output value. The logic then uses the output value to non-deterministically select (at a key selection 320) an encryption key from a plurality of encryption keys. If the memory access request is a read operation, the logic uses the selected key to decrypt (308) the contents of the memory location; and provides the decrypted contents to the processor. If the memory access request is a write operation, the logic uses the selected key to encrypt (310) a value comprised in the memory access request; and writes the encrypted value in the memory location.</p> |
