发明名称
摘要 <P>PROBLEM TO BE SOLVED: To absorb a variation in effective gain detected from equalization data by an effective gain having characteristics reverse to those of the detected effective gain in a PLL arranged such that a phase is detected using the equalization data from an equalizer and a sampling clock signal is controlled based on the detected phase information. <P>SOLUTION: An analog signal is converted into a digital signal and equalized, phase of the equalized signal is detected, an effective gain is detected based on the detected phase information, an effective gain approximated to have characteristics reverse to those of the detected effective gain is generated, and the effective gain is sustained at a constant level by the reverse characteristic effective gain. <P>COPYRIGHT: (C)2004,JPO&NCIPI
申请公布号 JP4168329(B2) 申请公布日期 2008.10.22
申请号 JP20030020554 申请日期 2003.01.29
申请人 发明人
分类号 G11B20/10;H03L7/093;G11B20/14;H03L7/08;H03L7/091;H04L7/033;H04L27/20 主分类号 G11B20/10
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