| 摘要 |
A redundancy circuit for a nonvolatile memory device is provided to reduce the layout area of a redundancy circuit by removing a capacitor and an inverter comprising an NMOS by using an NMOS turned on by a power-on reset signal. A sensing signal generation part(20) outputs a sensing signal in response to the cutting of a guard fuse and a power-on reset signal. A driving signal generation part(22) outputs a driving signal in response to the sensing signal and a ground voltage. A redundancy address fuse part(220) operates in response to the driving signal. The sensing signal generation part includes the guard fuse which is connected between a power supply voltage and a sensing node, and an NMOS transistor which is connected between the sensing node and a ground voltage and turned on according to the power-on reset signal. |
