| 摘要 |
<P>PROBLEM TO BE SOLVED: To provide a PLL circuit simultaneously realizing a wide oscillation frequency range and a satisfactory phase noise characteristic. <P>SOLUTION: In response to control signals from control terminals 51-54, the output voltage of a charge pump circuit 10 is regulated by a voltage regulation circuit 20, which is then applied to a variable capacity element 4020 via a filter circuit 30. With this, control sensitivity after the parallel synthesis of the variable capacity element 4020 and capacitors 4011, 4012, 4013 and 4014 is reduced, so as to obtain a predetermined frequency having low phase noise in the wide frequency range. <P>COPYRIGHT: (C)2006,JPO&NCIPI |
