发明名称 |
Method and system for calculating high frequency limit capacitance and inductance for coplanar on-chip structure |
摘要 |
Capacitance and inductance expressions used for modeling critical on-chip metal interconnects. A method for calculating high frequency limit capacitances C<SUB>∞</SUB> and inductances L<SUB>∞</SUB> of coplanar transmission line structures over silicon substrate utilizes field based expressions derived for a single coplanar T-line structures over silicon, and coupled coplanar T lines over silicon. For coupled coplanar structures, the field lines based calculation is performed separately for odd and even modes.
|
申请公布号 |
US7434186(B1) |
申请公布日期 |
2008.10.07 |
申请号 |
US20070948761 |
申请日期 |
2007.11.30 |
申请人 |
INTERNATIONAL BUSINESS MACHINES CORPORATION |
发明人 |
GOREN DAVID;SHEINMAN BENNY;SHLAFMAN SHLOMO |
分类号 |
G06F17/50 |
主分类号 |
G06F17/50 |
代理机构 |
|
代理人 |
|
主权项 |
|
地址 |
|