| 摘要 |
<p><P>PROBLEM TO BE SOLVED: To provide a data processor in which communication error between a control circuit and a memory circuit can be prevented by smoothing recovery from a reset state. <P>SOLUTION: The data processor includes the control circuit 21 for a display device and the memory circuit 24 connected to the control circuit 21 and the data processor is characterized in that it is equipped with a common reset circuit 23 for putting the control circuit 21 and the memory circuit 24 in a reset state and a delay circuit 25 for, when driving the control circuit 21 and the memory circuit 23 from the reset state to the reset release state, putting a memory circuit 24 from a reset state in a reset release state prior to the control circuit 21. <P>COPYRIGHT: (C)2008,JPO&INPIT</p> |
