| 摘要 |
PROBLEM TO BE SOLVED: To provide a method for designing a semiconductor integrated circuit suitable for fine structures and high integration density. SOLUTION: A cell arrangement allowable region and wiring information are inputted to a processing apparatus using a cell library and a net list (step A). Next, a cell 2 is arranged on the basis of the cell arrangement allowable region (step B). Next, wiring is conducted on the basis of the wiring information (step C). Next, whether non-wired region exists or not is verified using an examination program (step D). When there is a non-wired region an exclusive wiring region 4 is provided among the blocks arranged in the non-wired region (step E). The exclusive wiring region 4 is formed in part, in the area near the region in which non-wiring has been verified and is also set to be surrounded by the cell arrangement allowable region. Next, cell arrangement (step B) and wiring (step C) are executed again, after the exclusive wiring region 4 is set. Non-wiring passes through the exclusive wiring region 4. COPYRIGHT: (C)2008,JPO&INPIT
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