Reverse routing methods for integrated circuits having a hierarchical interconnect architecture

摘要

The present invention relates to methods for the global and detail routing of integrated circuits with hierarchical interconnect routing architecture. The methods includes the steps of: mapping routing resources of said integrated circuit to the nodes and edges of a graph theoretic tree, mapping each target to a target node; mapping each driver to a driver node; and routing each driver and its targets as a function of the minimum spanning tree spanning each driver node and its target nodes by traversing from the target nodes of a driver backwards toward its driver node in said tree. The methods of this invention are straightforward to implement, of polynomial time complexity, and can optimize routing resource usage.