发明名称 ENHANCEMENT MODE INSULATED GATE HETEROSTRUCTURE FIELD-EFFECT TRANSISTOR
摘要 Aspects of the present invention provide an enhancement mode (E-mode) insulated gate (IG) double heterostructure field-effect transistor (DHFET) having low power consumption at zero gate bias, low gate currents, and/or high reliability. An E-mode HFET in accordance with an embodiment of the invention includes: top and bottom barrier layers; and a channel layer sandwiched between the bottom and the top barrier layers, wherein the bottom and top barrier layers have a larger bandgap than the channel layer, and wherein polarization charges of the bottom barrier layer deplete the channel layer and polarization charges of the top barrier layer induce carriers in the channel layer; and wherein a total polarization charge in the bottom barrier layer is larger than a total polarization charge in the top barrier layer such that the channel layer is substantially depleted at zero gate bias.
申请公布号 US2008203430(A1) 申请公布日期 2008.08.28
申请号 US20070781338 申请日期 2007.07.23
申请人 SIMIN GRIGORY;SHUR MICHAEL;GASKA REMIGIJUS 发明人 SIMIN GRIGORY;SHUR MICHAEL;GASKA REMIGIJUS
分类号 H01L29/778 主分类号 H01L29/778
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