发明名称
摘要 <p>A memory device able to be produced without requiring high precision alignment, a method of production of the same, and a method of use of a memory device produced in this way, wherein a peripheral circuit portion (first semiconductor portion) formed by a first minimum processing dimension is formed on a substrate, a memory portion (second semiconductor portion) formed by a second minimum processing dimension smaller than the first minimum processing dimension is stacked above it, and the memory portion (second semiconductor portion) is stacked with respect to the peripheral circuit portion (first semiconductor portion) with an alignment precision rougher than the second minimum processing dimension or wherein memory cells configured by 2-terminal devices are formed in regions where word lines and bit lines intersect in the memory portion, and contact portions connecting the word lines and bit lines and the peripheral circuit portions are arranged in at least two columns in directions in which the word lines and the bit lines extend. <IMAGE></p>
申请公布号 JP4103497(B2) 申请公布日期 2008.06.18
申请号 JP20020242653 申请日期 2002.08.22
申请人 发明人
分类号 H01L27/00;H01L27/10;H01L21/8246;H01L27/105;H01L27/24 主分类号 H01L27/00
代理机构 代理人
主权项
地址