发明名称 Dispositif électronique à circuit intégré
摘要 948,011. Semi-conductor amplifying circuits. SOC. SUISSE POUR L'INDUSTRIE HORLOGERE S.A. March 24 1961 [April 1 1960], No. 10781/61. Heading H3T. [Also in Division H1] A two-stage amplifier comprises two fieldeffect transistors in cascade. As shown, each transistor comprises a common crystal 1 of P- type Si, an N-type layer 3, 4 and a P-type zone 5, 6, the layers 3, 4 being biased by a D.C. source S1 positive with respect to the earthed crystal 1 and zones 5, 6. Electrodes 7, 8 on layer. 3 and electrodes 9, 10 on layer 4 are connected, in series with a resistor 12, 13 respectively, across a second D.C. source 52. The input at terminals 25, 26 is impressed between the crystal 1 and one plate of capacitor C1, the other plate of which is connected to a control electrode 15 contacting zone 5 and, through a resistor 19, to earth. The output from the first stage is passed by a capacitor C2 to a control electrode 16 contacting zone 6 and, via a resistor 20, to earth. The output from the second stage is passed by a capacitor C3 to output terminals 29, 39. According to the extent of the reverse bias on layers 3, 4, the space charge regions associated with the crystal-layer junctions and the layer-zone junctions may permit currents through the layers between electrodes 7, 8 and 9, 10, or they may join, or even increase beyond the pinch-off value. The inputs to control electrodes 15, 16 modulate the layer currents.
申请公布号 BE602108(A1) 申请公布日期 1961.10.02
申请号 BE19610602108 申请日期 1961.03.31
申请人 SOCIETE SUISSE POUR L'INDUSTRIE HORLOGERE S.A. 发明人
分类号 G04G99/00;H01L21/00;H01L23/522;H01L27/098;H01L29/00;(IPC1-7):H01L 主分类号 G04G99/00
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