发明名称 |
SEMICONDUCTOR CIRCUIT DEVICE, ITS MANUFACTURING METHOD, AND ITS SIMULATION METHOD |
摘要 |
PROBLEM TO BE SOLVED: To make optimum, in a PMIS transistor and an NMIS transistor, a current driving capability of transistors constituting a semiconductor circuit device by the alteration of a layout. SOLUTION: The semiconductor circuit device comprises a PMIS transistor 40 including a first active region 3 formed on a semiconductor substrate 1 and including a first gate electrode 6p formed on the active region; an NMIS transistor 50 including a second active region 4 formed at a distance from the first active region 3 and including a second gate electrode 6n formed on the active region; dummy gates 10 at opposite sides of the first gate electrode 6p and in a region located within a predetermined distance from side surfaces thereof; and a liner film 11 formed to cover the MIS transistors 40, 50 and having stress. No dummy pattern is formed in the region within the predetermined distance on both sides of the second gate electrode. COPYRIGHT: (C)2007,JPO&INPIT
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申请公布号 |
JP2007123442(A) |
申请公布日期 |
2007.05.17 |
申请号 |
JP20050311679 |
申请日期 |
2005.10.26 |
申请人 |
MATSUSHITA ELECTRIC IND CO LTD |
发明人 |
SAWARA YASUYUKI;KAJITANI ATSUHIRO;TAMAKI YASUHIRO;TSUTSUI MASASHI;OTANI KAZUHIRO |
分类号 |
H01L21/8238;H01L21/822;H01L27/04;H01L27/092;H01L29/00 |
主分类号 |
H01L21/8238 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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