发明名称 Dynamic instruction sequence selection during scheduling
摘要 A list scheduler in a compiler can select from a plurality of alternative instruction sequences for one or more computation performed within an application. A scheduler can initially identify and track one or more computations for which multiple alternative instruction sequences exist. An available instruction list can be populated with the alternative instruction sequences. The list scheduler can access the available instruction list during scheduling of the application. The list scheduler can perform a cost analysis while scheduling the instructions by performing a look ahead. The list scheduler may select alternate instruction sequences for similar computations occurring in different portions of the application based on the cost benefit analysis.
申请公布号 US2007113223(A1) 申请公布日期 2007.05.17
申请号 US20050274602 申请日期 2005.11.14
申请人 NVIDIA CORPORATION 发明人 LUDWIG MICHAEL G.;KOLHE JAYANT B.
分类号 G06F9/45 主分类号 G06F9/45
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