Method and structure of ion implanted elements for the optimization of resistance

摘要

A method of forming a piezo-resistive sensor, comprising a piezo-resistor, a leadout resistor, and an insulator structure is provided. A Silicon-On-Insulator (SOI) substrate is provided having an epitaxial layer, a dielectric layer, and a bulk substrate layer. A mask layer is formed on top of the epitaxial layer. The mask layer defines where the piezo-resistor and leadout resistors are to be located by creating first exposed portions of the epitaxial layer. A silicon dioxide layer (SiO₂) is grown in a Local Oxidation of Silicon (LOCOS) process for a predetermined time on the first exposed portions based on the desired thickness of the piezo-resistor, where the-piezo resistor is located below the SiO₂ layer. The thickness of the leadout resistor, and therefore the parasitic leadout resistance, is determined by the original thickness of the epitaxial layer and can be maintained independent of the piezo-resistor thickness.