发明名称 METHOD FOR MANUFACTURING WIRING SUBSTRATE
摘要 <P>PROBLEM TO BE SOLVED: To provide a multilayer wiring substrate which is excellent in electric connection property and connection reliability in a device such as an LSI and a chip component, etc. <P>SOLUTION: A penetration conductor is formed on a ceramic green sheet 6 with a wiring conductive layer to be the surface of a ceramic green sheet lamination body 7. In this process, a part at a surface side forming the wiring conductive layer 2 of a through-hole 3 is filled with a first penetration conductive paste 4" which starts contraction at the temperature of a first range, and terminates the contraction at not more than the temperature of a second range. A part at the opposite side of the surface of the through-hole 3 is filled with a second penetration conductive paste 4' which starts contraction at the temperature of the second range. Then, the penetration conductor is formed on the ceramic green sheet with the wiring conductive layer. <P>COPYRIGHT: (C)2007,JPO&INPIT
申请公布号 JP2007123508(A) 申请公布日期 2007.05.17
申请号 JP20050312910 申请日期 2005.10.27
申请人 KYOCERA CORP 发明人 MAKINO HIROSHI
分类号 H05K3/46;C04B35/64 主分类号 H05K3/46
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