发明名称 |
Digital correction of nonlinearity errors of multibit delta-sigma digital to analog converters |
摘要 |
Digital correction of multibit ADAC nonlinearities for error feedback DACs is provided. The integral nonlinearity (INL) error of the multibit ADAC is estimated (on line or off line) by a low-resolution calibration ADC (CADC) and stored in a random-access memory (RAM) table. The INL values are then used to compensate for the ADAC's distortion in the digital domain. When this compensation is combined with mismatch-shaping techniques such as DWA, the resolution requirement for CADC can be relaxed significantly. The implementation of the proposed correction circuit for error-feedback modulators is inherently simple, since the correction only needs a digital summation without any additional digital filtering.
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申请公布号 |
US2007109164(A1) |
申请公布日期 |
2007.05.17 |
申请号 |
US20060430285 |
申请日期 |
2006.05.08 |
申请人 |
ARIAS JESUS;KISS PETER;RANSIJN JOHANNES G;YODER JAMES D |
发明人 |
ARIAS JESUS;KISS PETER;RANSIJN JOHANNES G.;YODER JAMES D. |
分类号 |
H03M3/00 |
主分类号 |
H03M3/00 |
代理机构 |
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地址 |
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