发明名称 CIRCUIT DESIGN SYSTEM AND PROGRAM
摘要 PROBLEM TO BE SOLVED: To provide a circuit design system capable of facilitating failure analysis efficiently with fewer observation points. SOLUTION: This circuit design system is provided with a storage part, a failure candidate extraction part, a determination part, and an observation point insertion part. The storage part stores a net list NET. The failure candidate extraction part extracts equivalent failure groups G<SB>1</SB>-G<SB>I</SB>(I represents an integer not less than 1) from the net list NET and generates failure candidate data CAN showing the equivalent failure group G<SB>i</SB>(i represents an integer not less than 1 and not more than I). The equivalent failure group G<SB>i</SB>includes a plurality of nodes N<SB>i1</SB>-N<SB>iJi</SB>(J<SB>i</SB>means the number of nodes included in the equivalent failure group Gi). The determination part 111 decides a target node, to which the observation point used for failure analysis is inserted, from a plurality of nodes N<SB>i1</SB>-N<SB>iji</SB>. In this process, the determination part decides the target node based on the number of nodes J<SB>i</SB>. The observation point insertion part inserts one or more observation points to the target node for updating the net list NET. COPYRIGHT: (C)2007,JPO&INPIT
申请公布号 JP2007122422(A) 申请公布日期 2007.05.17
申请号 JP20050313953 申请日期 2005.10.28
申请人 NEC ELECTRONICS CORP 发明人 NONAKA JUNPEI
分类号 G06F17/50;H01L21/82;H01L21/822;H01L27/04 主分类号 G06F17/50
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