发明名称 |
CHIP DESIGN VERIFYING AND CHIP TESTING APPARATUS AND METHOD |
摘要 |
A chip design verifying and chip testing apparatus includes a storing means for storing an application program verifying an operation of a designed chip and testing a manufactured chip having a plurality of blocks, an I/O file, and a test vector; an interface means controlling a data transmission between the storing means and the chip, and having a data applying means for applying the I/O file and/or the test vector outputted from the storing means and a data storing means for storing data outputted from the chip; and a computer including a CPU for performing and controlling the application program.
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申请公布号 |
US2007113209(A1) |
申请公布日期 |
2007.05.17 |
申请号 |
US20070619334 |
申请日期 |
2007.01.03 |
申请人 |
PARK HYUN-JU;YUN DONG-GOO |
发明人 |
PARK HYUN-JU;YUN DONG-GOO |
分类号 |
G06F17/50;G01R31/3183;G01R31/3187;G01R31/319;G06F11/26 |
主分类号 |
G06F17/50 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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