发明名称 METHOD OF MANUFACTURING CHIP AND FET (TRANSISTOR HAVING DIELECTRIC STRESSOR ELEMENT)
摘要 PROBLEM TO BE SOLVED: To provide a structure for adding an effective stress without influencing the arrangement of an element separation region to improve characteristics of a field effect transistor having a channel region, a source region, and a drain region which are arranged in an active semiconductor region. SOLUTION: A buried dielectric stressor element 102 having a horizontally extending upper surface is arranged below one part of an active semiconductor region 104 separated by a trench separation region 106. This dielectric stressor consists of an oxide film by oxidation of a porous silicon, and generates a compression or extension stress based on the degree of porous formation. COPYRIGHT: (C)2007,JPO&INPIT
申请公布号 JP2007123898(A) 申请公布日期 2007.05.17
申请号 JP20060290998 申请日期 2006.10.26
申请人 INTERNATL BUSINESS MACH CORP <IBM> 发明人 CHIDAMBARRAO DURESETI;GREENE BRIAN J;KERN LIM
分类号 H01L29/78;H01L21/76 主分类号 H01L29/78
代理机构 代理人
主权项
地址