发明名称 |
METHOD OF DEFINING SEMICONDUCTOR FABRICATION PROCESS UTILIZING TRANSISTOR INVERTER DELAY PERIOD |
摘要 |
A novel method and apparatus for defining process variation in a digital RF processor (DRP). The invention is well suited for use in highly integrated system on a chip (SoC) radio solutions that incorporate a very large amount of digital logic circuitry. The method and apparatus provide direct measurement of fabrication process variation in circuits without requiring any additional test equipment by utilizing a time to digital converter (TDC) circuit already present in the chip. The TDC circuit relies on the time delay in an inverter chain to sample a high speed CKV clock using a slow FREF clock. Calculation of inverse time provides a direct correlation for fabrication process variation in each die.
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申请公布号 |
US2007110194(A1) |
申请公布日期 |
2007.05.17 |
申请号 |
US20060550878 |
申请日期 |
2006.10.19 |
申请人 |
TEXAS INSTRUMENTS INCORPORATED |
发明人 |
DE OBALDIA ELIDA I.;STASZEWSKI ROBERT B.;LEIPOLD DIRK |
分类号 |
H04L27/08;H03L7/00 |
主分类号 |
H04L27/08 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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