发明名称 Yield improvement
摘要 An integrated circuit is designed to improve yield when manufacturing the integrated circuit, by obtaining a design element from a set of design elements used in designing integrated circuits. A variant design element is created based on the obtained design element, where a feature of the obtained design element is modified to create the variant design element. A yield to area ratio for the variant design element is determined. If the yield to area ratio of the variant design element is greater than a yield to area ratio of the obtained design element, the variant design element is retained to be used in designing the integrated circuit
申请公布号 US2006101355(A1) 申请公布日期 2006.05.11
申请号 US20050541076 申请日期 2005.06.29
申请人 PDF SOLUTIONS, INC. 发明人 CIPLICKAS DENNIS;DAVIS JOE;HESS CHRISTOPHER;LEE SHERRY;MALAVASI ENRICO;MOHAMMAD ABDULMOBEEN;RADOJCIC RATIBOR;STINE BRIAN;VALLISHAYEE RAKESH;ZANELLA STEFANO;DRAGONE NICOLA;GUARDIANI CARLO;QUARANTELLI MICHEL;TONELLO STEFANO;ANIRUDDHA JOSHI
分类号 G06F17/50;H01L 主分类号 G06F17/50
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