发明名称 Digitales Verfahren zur adaptiven Taktrückgewinnung
摘要 Adaptive clock recovery enables the clock of a CBR service to be recovered, this service being emulated from an ATM transmitter, is provided at an ATM receiver. The fill level of a first buffer receiving a stream of cells is used to provide coarse control of the rate of output of a stream of cells from the first buffer. The fill level of a further, fine, buffer receiving said stream of cells from the first buffer is monitored for determining a clock frequency, corresponding to the service clock frequency, for outputting cells from the fine buffer. The first buffer fill level control provides low pass cell jitter filtering by selectively supplying a first or a second clock frequency for outputting cells from the first buffer. The fine filter fill level control employs a phase locked loop responsive to the current fill level to set a clock frequency for reading out said fine buffer at the service clock frequency. <IMAGE>
申请公布号 DE69735527(D1) 申请公布日期 2006.05.11
申请号 DE1997635527 申请日期 1997.05.02
申请人 LSI LOGIC CORP., MILPITAS 发明人 LAURET, REGIS
分类号 H04J3/06;H04L12/56;H04Q11/04 主分类号 H04J3/06
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