发明名称 TRANSISTOR STRUCTURE WITH DUAL TRENCH FOR OPTIMIZED STRESS EFFECT AND METHOD THEREOF
摘要 <p>A method for forming a portion of a semiconductor device structure (30) comprises providing a semiconductor-on-insulator substrate having a semiconductor active layer (34), an insulation layer (32), and a semiconductor substrate. A first isolation trench (40) is formed within the semiconductor active layer and a stressor material (42) is deposited on a bottom of the first trench, wherein the stressor material includes a dual-use film. A second isolation trench (44) is formed within the semiconductor active layer, wherein the second isolation trench is absent of the stressor material on a bottom of the second trench. The presence and absence of stressor material in the first and second isolation trenches, respectively, provides differential stress: (i) on one or more of N-type or P-type devices of the semiconductor device structure, (ii) for one or more of width direction or channel direction orientations, and (iii) to customize stress benefits of one or more of a &lt;100&gt; or &lt;110&gt; semiconductor-on-insulator substrate.</p>
申请公布号 WO2006050051(A2) 申请公布日期 2006.05.11
申请号 WO2005US38847 申请日期 2005.10.25
申请人 CHEN, JIAN;FREESCALE SEMICONDUCTOR, INC.;TURNER, MICHAEL D.;VASEK, JAMES E. 发明人 CHEN, JIAN;TURNER, MICHAEL D.;VASEK, JAMES E.
分类号 H01L27/12;H01L21/84 主分类号 H01L27/12
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