发明名称 Pulse generation circuit
摘要 There is provided a pulse generation circuit having a small input load and capable of self-reset. The pulse generation circuit includes: a P-MOS transistor having a drain electrode connected to a first power source line; a first N-MOS transistor having a drain electrode connected to the source electrode of the P-MOS transistor; a second N-MOS transistor having a drain electrode connected to the source electrode of the first N-MOS transistor, a gate electrode connected to the input line to which an input pulse signal is input, and a source electrode connected to the second power source line; a delay circuit having an input terminal connected to the source electrode of the P-MOS transistor and the drain electrode of the first N-MOS transistor and an output terminal connected to the gate electrode of the P-MOS transistor and the gate electrode of the first N-MOS transistor; an inverter having an input terminal connected to the source electrode of the P-MOS transistor and the drain electrode of the second N-MOS transistor and an output terminal connected to the output line for outputting a generated pulse; and a keeper for keeping the voltage level of the line connected to the input terminal of the inverter.
申请公布号 US2006097768(A1) 申请公布日期 2006.05.11
申请号 US20050319729 申请日期 2005.12.29
申请人 FUJITSU LIMITED 发明人 IJITSU KENJI
分类号 G06F1/04;G06F1/08;G06F1/10;H03K5/04;H03K5/06;H03K5/13 主分类号 G06F1/04
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