发明名称 SIGNALING WITH MULTIPLE CLOCK LINES
摘要 At least two sequences of predetermined reference times are established on respective ones of at least two communication lines. At least some of the reference times of at least one of the sequences occur out-of-phase with at least some of the reference times of another of the sequences. Digital data is encoded onto data signals on one or more communication lines such that a time difference between at least one of the data signals and the nearest one of the reference times on one of the communication lines is smaller than the time difference between the same data signal and the nearest one of the reference times on another one of the communication lines.
申请公布号 KR20060041291(A) 申请公布日期 2006.05.11
申请号 KR20067001874 申请日期 2006.01.26
申请人 INTEL CORPORATION 发明人 TATE LARRY;WIG TIMOTHY
分类号 H04L7/00;H04L7/02;H04L25/08;H04L25/493 主分类号 H04L7/00
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