| 摘要 |
PROBLEM TO BE SOLVED: To provide a memory module usable for devices having different data bus width. SOLUTION: The memory module comprises an even number of memories 11, 12; a plurality of chip select terminals 214, 215 for inputting chip select signals as signals for selecting the memories, for being provided for each group of the memories when the memories are divided into even-numbered groups each having the same number of memories; a chip select signal line for connecting one 214 (215) of the plurality of chip select terminals to each of the memories 11, (12) in each group; a plurality of data terminal blocks 216, 217 provided for each of the even-numbered groups for inputting and outputting data signals; and a group of data signal lines for connecting one 216 (217) of the plurality of data terminal blocks to each of the memories 11 (12) in each group. COPYRIGHT: (C)2006,JPO&NCIPI
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