发明名称 Vertically stacked integrated circuits device comprising multi-substrates and method of manufacturing the same
摘要 Provided are a stacked integrated circuit device including multiple substrates and a method of manufacturing the same. A first integrated circuit substrate, a first integrated circuit formed on the first integrated circuit substrate, and a first passivation insulating layer are sequentially formed. Then, wafer bonding technique for forming an SOI substrate is used, thereby forming a second integrated circuit substrate on the first passivation insulating layer. While forming a second integrated circuit on the second integrated circuit substrate, at least one device-connecting interconnect electrically connects the first and second Integrated circuits and penetrates the second integrated circuit substrate and the first passivation layer. A second passivation insulating layer is formed on an upper surface of the second integrated circuit.
申请公布号 KR100574957(B1) 申请公布日期 2006.04.28
申请号 KR20030082974 申请日期 2003.11.21
申请人 发明人
分类号 H01L23/12;H01L21/762;H01L21/822;H01L25/065;H01L27/06 主分类号 H01L23/12
代理机构 代理人
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