发明名称 Soft-error rate improvement in a latch
摘要 In a preferred embodiment, the invention provides a circuit and method for reducing soft error events in latches. The input of a first inverter is connected to the output of a second inverter. The input of a second inverter is connected to the output of the first inverter. When the input to the first inverter is disturbed by a soft error event, a signal tristates the first inverter.
申请公布号 US2006087355(A1) 申请公布日期 2006.04.27
申请号 US20040976034 申请日期 2004.10.27
申请人 PETERSEN JOHN T 发明人 PETERSEN JOHN T.
分类号 H03K3/356 主分类号 H03K3/356
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