| 摘要 |
PROBLEM TO BE SOLVED: To achieve large-capacity, high-speed operation by securing reliability in a device in a fine region. SOLUTION: A memory cell comprising a gate insulating film 2, floating gate electrodes 3, 7, an interlayer insulating film 15, a control gate electrode 8, and a second-conductivity source region 11 and a second-conductivity drain region 10 is arranged at the first region on the main surface of a semiconductor substrate 1 in a matrix, and the element separation of the memory cell is set to be in a shallow groove element separation structure. By using a shallow groove structure by the embedding of an insulating film for element separation, a decrease is prevented in an element separation breakdown voltage at a fine region, further variations can be reduced in the threshold of a selecting transistor, and the disturbance resistance of the memory cell can be improved by dividing the memory cell in a memory map by the selecting transistor. COPYRIGHT: (C)2006,JPO&NCIPI
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