发明名称 Stacked multiple integrated circuit die package assembly
摘要 An electronic package assembly is formed with a plurality of integrated circuit dies stacked in layers. At least one first die is placed on a substrate. Each subsequent layer of the stack contains at least one die. Each die on each layer has a size and shape such that, when placed on the dies on a lower layer, it is offset from the edges of the dies on the lower layer to allow affixing of wirebonds to input/output pads of the dies on the lower layer. Each die on each layer with more than one die has input/output pads placed on two sides of the die. Each die on an upper layer is placed orthogonally to each die of a lower each layer such that wirebonds are affixed without interference.
申请公布号 US2006087013(A1) 申请公布日期 2006.04.27
申请号 US20040970785 申请日期 2004.10.21
申请人 ETRON TECHNOLOGY, INC. 发明人 HSIEH YUNG-CHING
分类号 H01L23/02 主分类号 H01L23/02
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