SCRAMBLING METHOD TO REDUCE WORDLINE COUPLING NOISE

摘要

A memory circuit and method to reduce array noise due to wordline coupling is disclosed. The circuit includes a plurality of memory cells arranged in rows and columns. Each row has a first part (1102) and a second part (1108). A first conductor is coupled to a respective column of memory cells in each first part. A second conductor is coupled to a respective column in each second part. A third conductor is coupled to a control terminal of each memory cell in the first part (1102) of a first row and the second part (1108) of a second row. In described embodiments, capacitive coupling is reduced by routing wordlines to limit the length proximity of adjacent logical wordlines.