发明名称 |
Verfahren zur Prüfung einer integrierten Schaltung mit vertraulichen Software- oder Hardware-elementen |
摘要 |
This method uses a tester (T) capable of being connected to an integrated circuit (CI) to be tested. A random number (RNG-C) is generated and ciphered using a key (k) by a cipher algorithm to obtain a password (G<SUB>k</SUB>(RNG)-C). The random number (RNG-C) is sent to the tester (T) in which the received random number (RNG-C) is ciphered using the same key (k) by a same cipher algorithm to generate therein a second password (G<SUB>k</SUB>(RNG)-T). This latter is sent to the integrated circuit (CI) to be compared to the first password (G<SUB>k</SUB>(RNG)-C). The test of the confidential parts ( 1 ) of the circuit is only authorised if the two passwords exhibit the required match. |
申请公布号 |
DE60026186(D1) |
申请公布日期 |
2006.04.27 |
申请号 |
DE2000626186 |
申请日期 |
2000.01.26 |
申请人 |
EM MICROELECTRONIC-MARIN S.A., MARIN |
发明人 |
FABRICE, WALTER;HUGUES, BLANGY |
分类号 |
G01R31/317;G01R31/3183;G01R31/28;G01R31/3185;G01R31/319;G06F1/00;G06F11/22;G06F11/26;G06F12/14;G06F21/24;H04L9/10 |
主分类号 |
G01R31/317 |
代理机构 |
|
代理人 |
|
主权项 |
|
地址 |
|