发明名称 Nonvolatile semiconductor memory device having reduced erasing time
摘要 An operation of erasing data in a memory block of a nonvolatile semiconductor memory device employs an operation of collectively applying an erase pulse to the memory block, and an operation of collectively applying an erase pulse to a limited region in the memory block. Thereby, the number of the erase pulses excessively applied to the memory cells, which passed verify, can be reduced as compared with a conventional structure so that the number of the memory cells to be subjected to over-erase recovery write decreases, and the total block erase time can be short.
申请公布号 US7050336(B2) 申请公布日期 2006.05.23
申请号 US20040930806 申请日期 2004.09.01
申请人 RENESAS DEVICES DESIGN CORP. 发明人 TOMOEDA MITSUHIRO;NAKAMURA MINORU
分类号 G11C11/34;G11C16/02;G11C16/06;G11C16/16 主分类号 G11C11/34
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