| 发明名称 |
Cache late select circuit |
| 摘要 |
A late select circuit topology has pseudo-static circuits that provide fast dynamic circuit operation without the use of dynamic clock timing signals. An output from a selected set is enabled by the conjunction of bit line pulse and set select signal.
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| 申请公布号 |
US7054184(B2) |
申请公布日期 |
2006.05.30 |
| 申请号 |
US20040844296 |
申请日期 |
2004.05.12 |
| 申请人 |
INTERNATIONAL BUSINESS MACHINES CORPORATION |
发明人 |
CHAN YUEN H.;CHAREST TIMOTHY J.;PELELLA ANTONIO R.;RAWLINS JOHN R. |
| 分类号 |
G11C11/00;G11C7/00;G11C11/417 |
主分类号 |
G11C11/00 |
| 代理机构 |
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代理人 |
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| 主权项 |
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| 地址 |
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