| 摘要 |
<P>PROBLEM TO BE SOLVED: To provide an ICE server capable of conveniently debugging the program of a multiprocessor system. <P>SOLUTION: An SW break management section 13 notifies a debugger 4A of the instruction code of an original program before a debugger 4B held by an SW break point table 12 sets an SW break point as a memory read result when a memory read request from the debugger 4A is directed to the SW break point set by the debugger 4B. When the memory read request from the debugger 4B is directed to the SW break point set by the debugger 4A, the SW break management section 13 notifies the debugger 4B of the instruction code of the original program before the debugger 4A held by the SW break point table 12 sets the SW break point as the memory read result. <P>COPYRIGHT: (C)2006,JPO&NCIPI |
